IES EC Government Jobs Exams

Q. The figure of merit of a logic family is given by

Option
a) gain bandwidth product
b) (propagation delay time) x (power dissipation)
c) (fan-out) x (propagation delay time)
d) (noise margin) x (power dissipation)

Read Solution (Total 1)

IES EC Other Question

Q. Match List-I with List-II and select the correct answer using the code given below the lists:

List-I
(Name of the circuit)
A. Pre-amplifier
B. Power amplifier
C. Rectifier circuit
D. Purely resistive circuit

List-II
(Property of the circuit)
A. Non-liner circuit
B. Lumped, linear passive, bilateral, finite circuit
C. Large signal amplifier
D. Small signal amplifier

Code: A B C D

a. 4 2 1 3
b. 1 3 4 2
c. 4 3 1 2
d. 1 2 4 3
Q. Which one of the following statements is correct?

Option
a) PROM contains a programmable AND array and a fixed OR array
b) PLA contains a fixed AND array and a programmable OR array
c) PROM contains a fixed AND array and a programmable OR array
d) PTA contains a programmable AND array and a fixed OR array